This invention relates generally to display excitation and updating circuitry and more particularly to simplified display excitation and updating circuitry for instruments having displays requiring an A.C. excitation.
Liquid Crystal Displays (LCD's) have many features which make them very attractive for use in digital electronic instruments, particularly those which are battery-operated. For many types of displays the power required to drive the display can make up a major portion of the power requirement of the entire instrument. LCD's on the other hand, require negligible power so that their use contributes greatly to battery life.
One problem experienced with LCD's is that to achieve acceptable life it is necessary to excite an LCD with an AC excitation signal having substantially no DC component. For known LCD's the frequency of the excitation signal should be between approximately 20 and 300 Hz. Since the clock frequency in most electronic instruments such as digital voltmeters (DVM's) is on the order of 10 Khz or higher, it has been necessary to provide either a separate, lower frequency, display oscillator to excite the LCD or a frequency divider to divide the instrument clock frequency down to a suitable value.
Both of these solutions require extra circuitry which increases the cost of the instrument and, in LSI implementations, increases the area of the IC chip. Since the yield of good IC chips in LSI manufacturing processes decreases exponentially with increases in chip area for chips of the sizes normally required for electronic instruments the requirement for any extra circuitry is burdensome.
This is particularly true for applications in highly competitive market areas such as low price digital multimeters where very little price flexibility exists and the requirement for more complexity in the display circuitry can prevent the incorporation of other desirable features into the meters.
In systems such as some analog to digital (A/D) converters which involve the synchronous transfer of data between an accumulating counter and the display registers to update the display, it has been the practice to use a 3 or more phase clock signal to accomplish the required functions of updating the counter, detecting the completion of the conversion cycle and transferring the data to the display register. In converters implemented in LSI integrated circuit chips the circuitry for implementing such multiphase clocks requires a relatively large amount of chip area and further increases chip cost and reduces yield.